awesome-open-hardware-verification

by ben-marshall

awesome listpushed about 3 years ago

A List of Free and Open Source Hardware Verification Tools and Frameworks

AI summary

Verification toolkit

A curated list of tools and frameworks for verifying the functional correctness of hardware designs.

stars: 497
forks: 48
watching: 43
awesome lists: 2
entries: 78

What's in the list

78 links in 46 sections, with live GitHub stats.activeno commit in 2y

Links

awesome-hdl
9782 years

Tools: / SymbiYosys

https://symbiyosys.readthedocs.io/en/latest/
Link:

Tools: / MCY

ISC
License:
77almost 2 years
https://github.com/YosysHQ/mcy
Link:
77almost 2 years

Tools: / Verilator

https://www.veripool.org/projects/verilator/wiki/Intro
Link:

Tools: / Icarus Verilog

https://github.com/steveicarus/iverilog
Link:
2.9Kalmost 2 years

Tools: / LibreCores CI

https://www.librecores.org/static/librecores-ci
Link:

AAPG

https://gitlab.com/shaktiproject/tools/aapg
Link:

riscv-dv

https://github.com/chipsalliance/riscv-dv
Link:
1K2 years

riscv-dv / covered

https://github.com/anders-code/verilog-covered
Link:
8almost 9 years

riscv-dv / svlint

https://github.com/dalance/svlint
Link:
3182 years

riscv-dv / sv-parser

https://github.com/dalance/sv-parser
Link:
412almost 2 years

riscv-dv / Surelog: System Verilog 2017 Pre-processor, Parser

https://github.com/chipsalliance/Surelog
Link:
373almost 2 years

riscv-dv / RgGen

https://github.com/rggen/rggen
Link:
341almost 2 years

riscv-dv / EBMC / CBMC

http://www.cprover.org/ebmc/
Link:
http://www.cprover.org/ebmc/download/license.txt
Licence:
http://www.cprover.org/cbmc/
Link:

riscv-dv / EBMC / CBMC / http://www.cprover.org/cbmc/

https://github.com/diffblue/cbmc
Source:
863almost 2 years

riscv-dv / EBMC / CBMC

https://github.com/diffblue/cbmc/blob/develop/LICENSE
Licence:
863almost 2 years

riscv-dv / FuseSoC

https://github.com/olofk/fusesoc
Link:
1.2Kalmost 2 years
BSD-2-Clause
License:
1.2Kalmost 2 years

riscv-dv / fsva

https://github.com/m-kru/fsva
Link:
224 years

riscv-dv / FORCE-RISCV

https://github.com/openhwgroup/force-riscv
Link:
268almost 3 years
Apache-2.0
License:
268almost 3 years

riscv-dv / RISC-V-TLM

https://github.com/mariusmm/RISC-V-TLM
Link:
285almost 2 years
GPL-3.0
License:
285almost 2 years

Frameworks: / Cocotb

Revised BSD License
Licence:
1.8Kalmost 2 years
https://github.com/cocotb/cocotb
Link:
1.8Kalmost 2 years

Frameworks: / python-uvm

Apache-2.0
License:
245over 2 years
https://github.com/tpoikela/uvm-python
Link:
245over 2 years
https://uvm-python.readthedocs.io/en/latest/
Documentation:
https://uvm-python.readthedocs.io/en/latest/uvm_users_guide_1.2.html
Users Guide:

Frameworks: / Cocotb Coverage

BSD-2-Clause
License:
106almost 3 years
https://github.com/mciepluc/cocotb-coverage
Link:
106almost 3 years

Frameworks: / Cocotb IPs

AXI Bus
219almost 3 years
Alex Forencich
Ethernet
56almost 3 years
Alex Forencich
PCIe
141almost 3 years
Alex Forencich

Frameworks: / fvutils/pyvsc

Apache-2.0
License:
1152 years
https://py-vsc.readthedocs.io/en/latest/
Documentation:
https://github.com/fvutils/pyvsc
Link:
1152 years

Frameworks: / riscv-formal

ISC
License:
589over 4 years
https://github.com/SymbioticEDA/riscv-formal
Link:
589over 4 years

Frameworks: / UVVM

MIT
License:
377almost 2 years
a bunch of stuff
Supports:
377almost 2 years
https://github.com/UVVM/UVVM
Link:
377almost 2 years

Frameworks: / Chisel Verify

Apache-2.0
License:
142almost 2 years
https://github.com/chiselverify/chiselverify
Link:
142almost 2 years

Frameworks: / VUnit

Mozilla Public License, v. 2.0.
License: baring OSVVM components
750almost 2 years
https://vunit.github.io/index.html
Link:

Frameworks: / V3

Non-commercial
License:
184 years
https://github.com/chengyinwu/V3
Link:
184 years

Frameworks: / ROHD Verification Framework

ROHD
Write Testbenches In: Dart with
377almost 2 years
BSD-3-Clause
License:
32over 2 years
ROHD
Supports: Organizing testbenches in a way similar to UVM; natively executing, debugging, and simulating hardware and the testbench in Dart; all features of including a fast event-based simulator
377almost 2 years
https://github.com/intel/rohd-vf
Link:
32over 2 years

Components / VIPs / uvm_axi

https://github.com/funningboy/uvm_axi
Link:
234over 13 years

Components / VIPs / AXI Bus Formal VIP

https://github.com/ZipCPU/wb2axip/blob/master/bench/formal/faxil_slave.v
Link:
496over 2 years

Components / VIPs / AXI Bus Functional Model - tvip-axi

https://github.com/taichi-ishitani/tvip-axi
Link:
363over 2 years

Components / VIPs / AXI SystemVerilog Modules and Verification Infrastructure

https://github.com/pulp-platform/axi
Link:
1.1Kalmost 2 years

Components / VIPs / APB Bus Functional Model - tvip-apb

https://github.com/taichi-ishitani/tvip-apb
Link:
26almost 3 years

Components / VIPs / Antmicro USB Test Suite

https://github.com/antmicro/usb-test-suite-build
Link:
503 years

Guides: / Dan Gisselquist Formal Verification Blogs

https://zipcpu.com/formal/formal.html
Link:

Guides: / Verification Gentleman Blog

https://blog.verificationgentleman.com/
Link:
https://github.com/verification-gentleman-blog
GitHub organisation with example code:

Guides: / Bits Bytes and Gates

http://bitsbytesgates.blogspot.com/
Link:

Projects / OpenHW Group Functional Verification

https://github.com/openhwgroup/core-v-verif
Github Link:
458almost 2 years
https://core-v-docs-verif-strat.readthedocs.io/en/latest/
Verification Strategy Document:
Solderpad V2
License:
458almost 2 years

Projects / LowRISC Style Guides

CC-BY-4.0
License:
3772 years
https://github.com/lowRISC/style-guides
Link:
3772 years

Conferences: / ORCONF

https://orconf.org/
Link:

Conferences: / OSDA

https://osda.gitlab.io/motivation.html
Longer Description:
https://osda.gitlab.io/
Link:

Conferences: / CHIPS Alliance Workshop on Open Source Design Verification

https://chipsalliance.org/workshops-meetings/
Link:

Conferences: / Workshop on Open-Source EDA Technology (WOSET)

https://woset-workshop.github.io/
Link:

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