Surelog

SystemVerilog processor

Provides a comprehensive front-end for SystemVerilog 2017 design and testbench processing

SystemVerilog 2017 Pre-processor, Parser, Elaborator, UHDM Compiler. Provides IEEE Design/TB C/C++ VPI and Python AST & UHDM APIs. Compiles on Linux gcc, Windows msys2-gcc & msvc, OsX

GitHub

373 stars
27 watching
68 forks
Language: C++
last commit: almost 2 years ago
Linked from 3 awesome lists

antlrantlr4-grammarelaborationlinterparserparser-astpreprocessorpython-apisystemveriloguvmverilogvpivpi-apivpi-standard

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