libsv
HDL library
A SystemVerilog digital hardware IP library with automated testbenches and continuous integration
An open source, parameterized SystemVerilog digital hardware IP library
23 stars
2 watching
4 forks
Language: SystemVerilog
last commit: 7 months ago
Linked from 1 awesome list
asicasic-librarydigital-designfpgafpga-libraryhardwarehardware-designshardware-librarieshdlipsystemverilogverilog
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