Pyverilog

HDL analyzer

Toolkit for analyzing and processing Verilog HDL designs

Python-based Hardware Design Processing Toolkit for Verilog HDL

GitHub

640 stars
45 watching
180 forks
Language: Python
last commit: 5 months ago
Linked from 2 awesome lists

code-generatorcompilercontrol-flow-analyzerdataflow-analyzerhardwareparserpythonverilog-hdl

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