veriloggen
Hardware builder
A framework that allows designing hardware using Python, providing high-level abstractions for efficient domain-specific languages and tools.
Veriloggen: A Mixed-Paradigm Hardware Construction Framework
306 stars
35 watching
58 forks
Language: Python
last commit: 3 months ago
Linked from 2 awesome lists
compilerhardwarehardware-construction-languagehigh-level-synthesispythonpyverilogverilog-hdl
Related projects:
Repository | Description | Stars |
---|---|---|
bogdanvuk/pygears | A framework for designing and building hardware systems using high-level Python constructs. | 146 |
mflowgen/mflowgen | A tool for designing and building modular hardware systems with parametric flexibility | 232 |
pyhdi/pyverilog | Toolkit for analyzing and processing Verilog HDL designs | 640 |
cornell-brg/pymtl | A Python-based framework for building and testing hierarchical hardware models at multiple levels of abstraction. | 237 |
nic30/hwt | A toolset for generating and simulating hardware designs with Python | 202 |
siliconcompiler/siliconcompiler | A modular hardware build system that automates the process of designing and simulating electronic circuits. | 861 |
pascalkuthe/openvaf | A Verilog-A compiler built with Rust to compile circuit simulator models into efficient and high-quality code. | 129 |
verigood-ml/public | Translates ONNX models to Verilog-based hardware implementations | 51 |
amaranth-lang/amaranth | A Python-based language and toolchain for designing and synthesizing digital hardware | 1,572 |
pyhgl/pyhgl | A language and toolset for designing and verifying digital circuits using high-level Python syntax | 40 |
nic30/hwtbuildsystem | A Python library providing utilities and scripts for building and analyzing hardware designs | 7 |
m-labs/migen | A Python toolbox for building digital hardware by providing a high-level, Python-based framework for designing and synthesizing digital circuits. | 1,228 |
pymtl/pymtl3 | A Python-based framework for generating, simulating and verifying hardware designs at the cycle level. | 387 |
philtomson/rhdl | A Ruby-based language for describing digital hardware components and their behavior. | 14 |
ucsbarchlab/pyrtl | A Pythonic framework for designing and simulating digital circuits | 257 |