veriloggen

Hardware builder

A framework that allows designing hardware using Python, providing high-level abstractions for efficient domain-specific languages and tools.

Veriloggen: A Mixed-Paradigm Hardware Construction Framework

GitHub

306 stars
35 watching
58 forks
Language: Python
last commit: 3 months ago
Linked from 2 awesome lists

compilerhardwarehardware-construction-languagehigh-level-synthesispythonpyverilogverilog-hdl

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