systemc-compiler
SystemC compiler
Translates SystemC code to synthesizable SystemVerilog for hardware design and synthesis.
This tool translates synthesizable SystemC code to synthesizable SystemVerilog.
249 stars
17 watching
36 forks
Language: C++
last commit: about 1 month ago
Linked from 1 awesome list
clanghardware-designshlsllvmsystemc
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
 systemrdl/systemrdl-compiler | A Python-based compiler that translates SystemRDL 2.0 language into hardware description format for ASIC and FPGA design. | 235 |
 clash-lang/clash-compiler | A compiler that transforms high-level Haskell descriptions into synthesizable hardware descriptions. | 1,442 |
 sysprog21/shecc | A compiler for C optimized for 32-bit ARM and RISC-V architectures with minimal dependencies. | 1,131 |
 davidgiven/cowgol | A programming language designed to be self-hosted on small systems, compiled from itself, and optimized for tiny size and speed. | 248 |
 jserv/amacc | A compiler for the Arm architecture that compiles a subset of C to generate executables and supports just-in-time execution. | 1,015 |
 chipsalliance/surelog | Provides a comprehensive front-end for SystemVerilog 2017 design and testbench processing | 367 |
 siliconcompiler/lambdalib | A modular hardware abstraction library for designing and implementing complex digital systems | 23 |
 vlm/asn1c | Compiles ASN.1 definitions into C code for serialization and deserialization of data files. | 1,051 |
 unity-technologies/hlslcc | A compiler that translates DirectX shader bytecode into various shader languages for use in game engines and other graphics applications. | 854 |
 ttsiodras/asn1scc | An ASN.1 compiler designed to compile ASN.1 definitions into efficient code for embedded systems. | 0 |
| jserv/mazucc | A minimal C compiler generating x86_64 assembly code | 516 |
| chipsalliance/synlig | A SystemVerilog synthesis tool that generates digital circuit designs from HDL code | 169 |
| chipsalliance/uhdm | Generates C++ implementation of the SystemVerilog Object Model and related tools based on YAML descriptions | 202 |
 l1mey112/crepl | A compiler and interpreter for executing C code on the fly as it is typed. | 30 |
 rdaly525/coreir | Builds hardware descriptions into executable code using an LLVM-style compiler framework. | 101 |