synlig

chipsalliance/surelog373

SystemVerilog processor

Provides a comprehensive front-end for SystemVerilog 2017 design and testbench processing

chipsalliance/verible1.4K

SystemVerilog parser

Develops a system for parsing and analyzing SystemVerilog code to improve developer productivity and ensure style compliance.

chipsalliance/uhdm204

Object model generator

Generates C++ implementation of the SystemVerilog Object Model and related tools based on YAML descriptions

chipsalliance/sv-tests302

SystemVerilog tester

A comprehensive test suite for SystemVerilog standard compliance across various Verilog tools.

siliconcompiler/lambdalib23

Digital system framework

A modular hardware abstraction library for designing and implementing complex digital systems

intel/systemc-compiler256

SystemC translator

Translates synthesizable SystemC code to synthesizable SystemVerilog.

chipsalliance/f4pga362

FPGA toolkit

Collaborative project to develop and share software tools and workflows for FPGAs.

galacticstudios/kicadverilog57

Circuit simulator

Converts KiCad schematic designs into Verilog code to simulate and design digital circuits

zachjs/sv2v571

design converter

Converts SystemVerilog to Verilog code for hardware design and simulation

nvlabs/verilog-eval188

Code generator

An evaluation harness for generating Verilog code from natural language prompts

yosyshq/sby413

Verification tool

A front-end driver program for Yosys-based formal hardware verification flows

lsils/benchmarks170

Logic Synthesis Benchmarks

A collection of benchmarks designed to test the performance and capabilities of logic synthesis tools in digital electronics.

chipsalliance/riscv-dv1K

RISC-V simulator

An instruction generator for RISC-V processor verification

chiselverify/chiselverify142

Verification tool

A verification library for digital hardware described in Chisel or legacy components from VHDL, Verilog, or SystemVerilog

sgherbst/svreal43

Real number library

A synthesizable real number library in SystemVerilog, supporting both fixed-point and floating-point formats for digital design.