systemrdl-compiler

Compiler

A Python-based compiler that translates SystemRDL 2.0 language into hardware description format for ASIC and FPGA design.

SystemRDL 2.0 language compiler front-end

GitHub

235 stars
27 watching
68 forks
Language: Python
last commit: 3 months ago
Linked from 1 awesome list

asiccsrdesign-automationedafpgahardware-description-languageregister-description-languageregister-descriptionsregisterssystemrdlsystemrdl-compiler

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