cva6

CPU core

A 6-stage RISC-V CPU implementation with various features and configurations.

The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

GitHub

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692 forks
Language: Assembly
last commit: 1 day ago
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arianeasiccpufpgarisc-vrv64gcsystemverilog-hdl

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