core-v-verif

openhwgroup/cv32e40x225

RISC-V core

A 4-stage RISC-V core for compute-intensive applications with a general-purpose extension interface

openhwgroup/cv32e40s133

RISC-V core

A secure, 4-stage RISC-V core designed for high-security applications with both machine mode and user mode capabilities

openhwgroup/cvw282

RISC-V processor core

A configurable RISC-V processor core with various extensions and peripherals

openhwgroup/force-riscv268

Instruction generator

Generates RISC-V instruction sequences for test verification and modeling

openhwgroup/cve229

RISC-V core

A 32-bit RISC-V CPU core with a two-stage pipeline designed for low-cost embedded control applications.

sifive/prockami22

Processor simulator

Formal verification and implementation of RISC-V processor designs using Coq.

chipsalliance/cores-veer-eh1830

RISC-V Core

A RISC-V processor core design implemented in SystemVerilog RTL

symbioticeda/riscv-formal589

RISC-V Verifier

A framework for formally verifying RISC-V processors by providing a processor-independent formal description and testbenches.

osvvm/osvvmlibraries52

Verification framework

Provides reusable and modular VHDL verification components for creating testbenches and verifying digital circuits.

chipsalliance/cores-veer-el2252

RISC-V processor core

A Verilog RTL design for an EL2 RISC-V core with various peripherals and features

openhwgroup/cvfpu440

Floating-point unit

A flexible and parameterizable floating-point unit design for RISC-V processors

chipsalliance/riscv-dv1K

RISC-V simulator

An instruction generator for RISC-V processor verification

standardsemiconductor/lion249

RISC-V core

Develops a formally verified RISC-V processor core using Haskell

olofk/serv1.5K

RISC-V CPU

An award-winning RISC-V CPU designed for low-power and area-efficient designs

wyvernsemi/pcievhost86

PCIe simulator

Generates PCIe traffic and supports logic simulation environments