serv
RISC-V CPU
An award-winning RISC-V CPU designed for low-power and area-efficient designs
SERV - The SErial RISC-V CPU
1k stars
38 watching
192 forks
Language: Verilog
last commit: 3 months ago
Linked from 1 awesome list
asicfpgarisc-vverilog
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
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