cvw
RISC-V processor core
A configurable RISC-V processor core with various extensions and peripherals
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional caches, BP, FPU, VM/MMU, AHB, RAMs, and peripherals.
282 stars
33 watching
199 forks
Language: SystemVerilog
last commit: 2 months ago
Linked from 1 awesome list
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