riscv-formal

openhwgroup/core-v-verif458

RISC-V core simulator

Functional verification project for RISC-V cores

mit-pdos/perennial165

System verifier

A system for verifying correctness of concurrent and crash-safe systems with recovery procedures

mit-plv/riscv-semantics159

RISC-V semantics

A formal specification of the RISC-V instruction set architecture in Haskell

chipsalliance/riscv-dv1K

RISC-V simulator

An instruction generator for RISC-V processor verification

b224hisl/rioschip33

RISC-V processor

A small RISC-V core designed to support out-of-order execution and double issue architecture for efficient instruction processing.

rust-embedded/riscv874

Microcontroller library

Provides low-level access and interfaces for writing software on RISC-V microcontrollers.

standardsemiconductor/lion249

RISC-V core

Develops a formally verified RISC-V processor core using Haskell

valida-xyz/valida303

Virtual Machine

A STARK-based virtual machine designed to improve code reuse, performance and modularity through a custom instruction set, compiler and extensibility features.

sifive/prockami22

Processor simulator

Formal verification and implementation of RISC-V processor designs using Coq.

chipsalliance/cores-veer-eh1830

RISC-V Core

A RISC-V processor core design implemented in SystemVerilog RTL

osvvm/osvvmlibraries52

Verification framework

Provides reusable and modular VHDL verification components for creating testbenches and verifying digital circuits.

risc0/risc01.7K

Virtual Machine

A platform for executing and verifying computations in a secure, programmable virtual machine.

riscv-mcu/riscv-openocd35

RISC-V debugger

A fork of OpenOCD with RISC-V microcontroller support

openhwgroup/cv32e40s133

RISC-V core

A secure, 4-stage RISC-V core designed for high-security applications with both machine mode and user mode capabilities

riscv-rust/gd32vf103-pac36

Microcontroller API

A peripheral access crate for a specific microcontroller family