Cores-VeeR-EL2

chipsalliance/cores-veer-eh1830

RISC-V Core

A RISC-V processor core design implemented in SystemVerilog RTL

openhwgroup/cve229

RISC-V core

A 32-bit RISC-V CPU core with a two-stage pipeline designed for low-cost embedded control applications.

b224hisl/rioschip33

RISC-V processor

A small RISC-V core designed to support out-of-order execution and double issue architecture for efficient instruction processing.

olofk/serv1.5K

RISC-V CPU

An award-winning RISC-V CPU designed for low-power and area-efficient designs

openhwgroup/cv32e40x225

RISC-V core

A 4-stage RISC-V core for compute-intensive applications with a general-purpose extension interface

chipsalliance/surelog373

SystemVerilog processor

Provides a comprehensive front-end for SystemVerilog 2017 design and testbench processing

openhwgroup/cvw282

RISC-V processor core

A configurable RISC-V processor core with various extensions and peripherals

standardsemiconductor/lion249

RISC-V core

Develops a formally verified RISC-V processor core using Haskell

lowrisc/ibex1.4K

RISC-V CPU core

A 32-bit RISC-V CPU core designed for embedded control applications with configurable extensions and parameters.

stnolting/neorv321.6K

Embedded processor

An open source 32-bit RISC-V CPU and microcontroller-like SoC written in VHDL for customizable embedded systems

openhwgroup/core-v-verif458

RISC-V core simulator

Functional verification project for RISC-V cores

openhwgroup/cv32e40s133

RISC-V core

A secure, 4-stage RISC-V core designed for high-security applications with both machine mode and user mode capabilities

chipsalliance/riscv-dv1K

RISC-V simulator

An instruction generator for RISC-V processor verification

ronsor/riscv-zig48

CPU emulator

A RISC-V CPU emulator written in Zig.

black-parrot/black-parrot634

RISC-V core

A Linux-capable RISC-V multicore accelerator designed to be small, modular, and easy to use for various applications.