Awesome Lists

core_ddr3_controller

by ultraembedded

Verilogpushed almost 5 years ago

A DDR3 memory controller in Verilog for various FPGAs

AI summary

DDR3 controller

A lightweight AXI-4 DDR3 controller designed to run at reduced clock speeds, simplifying the interface with FPGAs.

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375
forks
88
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19
awesome list
1
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