core_ddr3_controller
DDR3 controller
A lightweight AXI-4 DDR3 controller designed to run at reduced clock speeds, simplifying the interface with FPGAs.
A DDR3 memory controller in Verilog for various FPGAs
375 stars
19 watching
88 forks
Language: Verilog
last commit: over 3 years ago
Linked from 1 awesome list
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
| ultraembedded/core_jpeg | A Verilog implementation of a high-performance JPEG decoder core for FPGA-based video playback systems | 216 |
| ultraembedded/core_axi_cache | A Verilog implementation of a 128KB AXI cache with limited pseudo-random replacement and write-back architecture | 47 |
 chipsalliance/cores-veer-eh1 | A RISC-V processor core design implemented in SystemVerilog RTL | 830 |
 octaprog7/veml6040 | A MicroPython module for controlling a color sensor with photodiodes and CMOS processing | 0 |
 russhughes/s3lcd | A MicroPython driver for ESP32-S3 devices with ST7789 displays | 74 |
 ulixxe/usb_cdc | A Verilog module implementing a full-speed USB communications device class for FPGA and ASIC designs. | 159 |
 arduino/arduinocore-avr | Provides the core software components and configuration files for a specific type of microcontroller board platform. | 1,257 |
| chipsalliance/cores-veer-el2 | A Verilog RTL design for an EL2 RISC-V core with various peripherals and features | 252 |
 antirez/uc8151_micropython | A MicroPython driver for controlling e-paper displays using the UC8151 chip | 139 |
 obdev/v-usb | A firmware-only USB implementation for AVR microcontrollers | 1,220 |
 bespoke-silicon-group/bsg_ddr3_io | Designs and automates simulation of a DDR3 interface for a specific IC process | 5 |
 xmc-rs/xmc4500 | A peripheral interface library for embedded microcontrollers | 3 |
 zeroasiccorp/umi | Defines a standard interface for accessing memory through request-response transactions. | 142 |
| xmc-rs/xmc4800 | A Rust library for interfacing with the XMC4800 microcontroller peripheral interface | 3 |
 rdagger/micropython-hpdl1414 | A MicroPython module for controlling a smart alphanumeric display with limited character capabilities | 0 |