usb_cdc

USB interface

A Verilog module implementing a full-speed USB communications device class for FPGA and ASIC designs.

Single/Multi-channel Full Speed USB interface for FPGA and ASIC designs

GitHub

158 stars
10 watching
11 forks
Language: Verilog
last commit: 9 months ago
Linked from 1 awesome list

asicbootloadercdc-acmfomufpgaserialtinyfpga-bxusbusb-cdcusb-deviceverilog

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