nvc

VHDL simulator

A VHDL compiler and simulator that translates VHDL code into native machine code for simulation purposes.

VHDL compiler and simulator

GitHub

636 stars
41 watching
80 forks
Language: VHDL
last commit: 7 days ago
Linked from 2 awesome lists

compilerfpgasimulatorvhdl

Backlinks from these awesome lists:

Related projects:

Repository Description Stars
jdeblese/gbcpu A VHDL implementation of the Gameboy CPU and its peripherals 9
nic30/hwt A toolset for generating and simulating hardware designs with Python 202
ua-rcl/ranc An open-source software platform for simulating and experimenting with neuromorphic architectures. 40
nvlabs/verilog-eval An evaluation harness for generating Verilog code from natural language prompts 179
havivha/nand2tetris An implementation of a complete computer using Nand gates on up as described in the book 'The Elements of Computing Systems' 419
nic30/hdlconvertor An ANTLR4-based parser and code generator for SystemVerilog/VHDL 280
kev-cam/v2k-top A software framework for parsing and simulating digital circuits described in Verilog and C++ languages. 7
galacticstudios/kicadverilog Converts KiCad schematic designs into Verilog code to simulate and design digital circuits 54
nvdla/hw The NVDLA project provides hardware designs and tools for building deep learning inference accelerators. 1,744
pascalkuthe/openvaf A Verilog-A compiler built with Rust to compile circuit simulator models into efficient and high-quality code. 129
asyncvlsi/act Asynchronous circuit design and simulation tools using a hardware description language. 99
quil-lang/qvm A high-performance simulator for quantum computing instructions 415
nvpro-samples/gl_vk_chopper A simple Vulkan rendering example 206
pyhgl/pyhgl A language and toolset for designing and verifying digital circuits using high-level Python syntax 40
ucsc-vama/essent A tool that generates C++ code from hardware designs in a specific IR format to simulate the design at high performance 139