bazel_rules_hdl
Circuit synthesis toolset
A set of build rules and tools for synthesizing digital circuit designs from hardware description languages (HDLs) into usable ASIC chips.
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
121 stars
17 watching
45 forks
Language: Starlark
last commit: 4 days ago
Linked from 1 awesome list
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
 xilinx/hls | A collection of tools and code for designing and implementing digital circuits using high-level synthesis | 380 |
 chaseruskin/legohdl | A package manager and development tool for Hardware Description Languages (HDL) used to manage digital designs and intellectual property. | 14 |
 aherrmann/rules_zig | Bazel build rules for the Zig programming language | 44 |
 analogdevicesinc/hdl | Analog Devices Inc. provides reference designs and HDL libraries for various FPGA projects | 1,536 |
 davidthings/hdelk | A tool for creating and displaying diagrams of digital circuits using a simple JavaScript API. | 73 |
 cambridgehackers/fpgamake | Generates Makefiles to synthesize and route digital circuits from Verilog designs using Vivado | 93 |
 vlsir/hdl21schematics | Provides a format and tools for creating graphical representations of electronic circuits using SVG images | 14 |
 dan-fritchman/hdl21 | A hardware description library for analog and custom integrated circuits using Python | 69 |
 terostechnology/vscode-teroshdl | A suite of tools and plugins for HDL developers to simplify development, testing, and maintenance of digital circuits. | 580 |
 blarney-lang/blarney | A Haskell library for creating hardware descriptions using a functional programming style | 98 |
 pyhdi/pyverilog | Toolkit for analyzing and processing Verilog HDL designs | 645 |
 frwang96/verik | A toolchain for designing and verifying digital integrated circuits using Kotlin. | 41 |
 nic30/hwtlib | A comprehensive hardware abstraction layer providing tools and components for designing and testing digital systems on FPGAs. | 35 |
 janestreet/hardcaml | A comprehensive OCaml library and toolset for designing, testing, and simulating digital hardware | 677 |
 asyncvlsi/act | Asynchronous circuit design and simulation tools using a hardware description language. | 102 |