verilog-ethernet
Ethernet module set
A collection of Verilog modules implementing Ethernet components and a complete UDP/IP stack for various network interfaces.
Verilog Ethernet components for FPGA implementation
2k stars
118 watching
709 forks
Language: Verilog
last commit: 7 months ago
Linked from 1 awesome list
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
| alexforencich/cocotbext-eth | Provides Ethernet interface modules for Cocotb simulation | 56 |
 jeelabs/esp-link | A Wifi-serial bridge that connects microcontrollers to the internet via an ESP8266 module. | 2,863 |
| alexforencich/verilog-wishbone | Components for building Wishbone bus systems with flexible interfaces and parametrization. | 109 |
 ntruchsess/arduino_uip | A plugin-replacement of the stock Arduino Ethernet library providing persistent TCP connections and UDP support | 491 |
| alexforencich/verilog-pcie | A collection of Verilog modules implementing PCIe interfaces and bridges for various FPGAs | 1,162 |
| alexforencich/verilog-axis | Provides a collection of Verilog modules and wrappers for designing AXI stream bus components in FPGAs. | 750 |
| alexforencich/verilog-uart | A Verilog implementation of a basic UART (Universal Asynchronous Receiver-Transmitter) to AXI Stream interface. | 427 |
 qihoo360/evpp | A modern C++ network library for developing high-performance TCP/UDP/HTTP services. | 3,616 |
 knolleary/pubsubclient | A library for simple publish/subscribe messaging with an Arduino Ethernet Shield. | 3,852 |
 zerotier/zerotierone | A smart programmable Ethernet switch that enables peer-to-peer networking and encryption for networked devices worldwide. | 14,719 |
 gioblu/pjon | An experimental network protocol stack designed for low-power, flexible wireless communication on various microcontrollers and real-time systems. | 2,733 |
| alexforencich/verilog-i2c | An FPGA implementation of an I2C interface with various slave and master interfaces. | 557 |
 ntop/pf_ring | A framework for high-speed packet processing on Linux kernels. | 2,718 |
 cornell-brg/pymtl3-net | Generates synthesizable Verilog for on-chip networks with customizable parameters and modular design | 43 |
 f-stack/f-stack | A high-performance network framework that bypasses the kernel to achieve better performance and scalability. | 3,888 |