HDLGen
HDL generator
Automates HDL generation from embedded scripts in Verilog source code
HDLGen is an HDL generation tool, supporting embedded Perl or Python script, reduce manual work & improve effiency with a few embedded functions, with ZERO learning-curve
88 stars
7 watching
25 forks
Language: Verilog
last commit: almost 3 years agoLinked from 1 awesome list
asicautomationhdlperlpythonrtlscriptsocverilog
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