bsg_pipeclean_suite
AI summary
CAD flow tests
A collection of Verilog designs for stress testing new CAD flows with increasing complexity
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Similar projects
Found by comparing what the projects do, not just their names.
DDR interface design
Designs and automates simulation of a DDR3 interface for a specific IC process
SRAM generator
A tool for generating black-boxed SRAMs for use in CAD flows.
BGA packages
A collection of reusable hardware accelerator packages and sockets for various ball grid array (BGA) sizes.
Hardware accelerator platform
A collection of designs and tools for developing and testing hardware accelerators
Circuit simulator
Converts KiCad schematic designs into Verilog code to simulate and design digital circuits
HW primitives library
A comprehensive hardware library for SystemVerilog that provides commonly used HW primitives.
Compiler
A Haskell-based compiler for hardware description languages like VHDL, Verilog, and SystemVerilog.
CAD tool
A Haskell-based CAD program that supports CSG, bevels, and shells, as well as 2D & 3D geometry and GCode generation.
Hardware design tool
A toolchain for designing and synthesizing digital electronic hardware
aucohl/fault141
DFT toolkit
A comprehensive design-for-testing solution for digital systems
Circuit simulator
Asynchronous circuit design and simulation tools using a hardware description language.
Tile processor
A tile-based architecture designed for high-performance computing with efficient scalability and generality
Verilog-A compiler
A Verilog-A compiler built with Rust to compile circuit simulator models into efficient and high-quality code.
FPGA toolkit
Collaborative project to develop and share software tools and workflows for FPGAs.
Hardware builder
A tool for designing and building modular hardware systems with parametric flexibility
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