tnoc

Network router

A SystemVerilog implementation of a 2D mesh network-on-chip router/fabric with features like flow control and virtual channels.

Network on Chip Implementation written in SytemVerilog

GitHub

158 stars
13 watching
44 forks
Language: SystemVerilog
last commit: about 2 years ago
Linked from 1 awesome list

ambaamba-axiaxiaxi4network-on-chipnocsystemveriloguvm

Backlinks from these awesome lists:

Related projects:

Repository Description Stars
taichi-ishitani/tvip-axi An AMBA AXI4 VIP implementation in SystemVerilog 362
ueqri/vis4mesh A tool for designing and analyzing mesh Network-on-Chips (NoC) in computer architecture research 10
networktocode/ntc-ansible An Ansible collection providing a set of reusable modules for automating network device management tasks. 278
davidepatti/noxim A software tool for simulating and analyzing Network-on-Chip architectures in computer networks 239
mtabini/chine An asynchronous process builder using finite-state machines in JavaScript 2
tchoutri/nvjorn A network services monitor written in Elixir using Poolboy. 16
alexxnb/tinro A lightweight router for Svelte applications 678
yquetzal/tnetwork A library to manipulate temporal networks and dynamic communities 15
xtaci/gaio A high-performance networking library for Go that reduces context switching and improves concurrency in networked applications. 815
taichi-ishitani/tvip-apb An open-source verification IP for the AMBA APB protocol written in SystemVerilog. 25
noaa-owp/t-route A dynamic channel routing model that supports multiple network formulations and various routing solutions. 44
zuikyo/zikrouter An interface-oriented routing tool for managing modules and injecting dependencies with protocols in iOS applications. 659
muir/nchi A lightweight and flexible HTTP router for building maintainable web services. 13
wasappli/waapprouting A routing library that handles URL recognition, controller displaying, and automatic preservation of the controller stack. 587
alexforencich/verilog-uart A Verilog implementation of a basic UART (Universal Asynchronous Receiver-Transmitter) to AXI Stream interface. 422