spydrnet

Netlist analyzer

A framework for analyzing and transforming FPGA netlists

A flexible framework for analyzing and transforming FPGA netlists. Official repository.

GitHub

92 stars
14 watching
22 forks
Language: Python
last commit: 9 months ago
Linked from 1 awesome list

cadcircuitcircuit-analysiscircuit-designcircuitscomputer-aided-designdigitaledaedifelectronic-design-automationfpgafpgashardwarehardware-designsnetlistnetlist-parsernetliststransformationtransformations

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