ILAng
SoC modeling tool
A modeling and verification platform for system-on-chip design using Intermediate Level Arithmetic
A Modeling and Verification Platform for SoCs using ILAs
75 stars
13 watching
18 forks
Language: C++
last commit: 8 months ago
Linked from 1 awesome list
abstractionacceleratorformalheterogeneousilailangsystem-on-chipverification
aolofsson/awesome-opensource-hardwareRelated projects:
| Repository | Description | Stars |
|---|---|---|
 bo-yuan-huang/ilang | A platform for designing and verifying digital systems using Intermediate Level Architecture (ILA) models | 3 |
 rubisco-sfa/ilamb | Software for comparing earth system models with reference data products, presenting results in web pages. | 47 |
 sri-csl/pvs | A verification system for formal methods and specification languages | 141 |
 gangtan/cpumodels | Formal models of computer architectures and verification tools for security checks and instrumentation | 36 |
 umass-foundation-model/3d-llm | Developing a Large Language Model capable of processing 3D representations as inputs | 979 |
 xverse-ai/xverse-7b | A multilingual large language model developed by XVERSE Technology Inc. | 50 |
 melih-unsal/demogpt | A comprehensive toolset for building Large Language Model (LLM) based applications | 1,733 |
 mit-plv/kami | A platform for high-level parametric hardware specification and modular verification | 143 |
 asyncvlsi/act | Asynchronous circuit design and simulation tools using a hardware description language. | 102 |
 gpustack/gpustack | Manages GPU clusters for running AI models | 850 |
 ys-zong/vl-icl | A benchmarking suite for multimodal in-context learning models | 31 |
 pcg-mlp/ksanallm | An LLM inference and serving engine with high performance, flexibility, and support for various hardware platforms. | 295 |
 zweifisch/ollama | An Emacs Lisp client that integrates AI-powered language tools into the Emacs editor | 50 |
 360cvgroup/360vl | A large multi-modal model developed using the Llama3 language model, designed to improve image understanding capabilities. | 32 |
 chipsalliance/synlig | A SystemVerilog synthesis tool that generates digital circuit designs from HDL code | 170 |