Analog-Design-of-1.9-GHz-PLL-system
PLL system
Designs a frequency synthesizer PLL system to produce a 1.92 GHz signal with a reference input of 30 MHz.
This project shows the design of a frequency synthesizer PLL system that produces a 1.92 GHz signal with a reference input of 30 MHz, with a comparison between using an LC VCO and using a Ring VCO.
57 stars
3 watching
14 forks
Language: MATLAB
last commit: over 1 year ago
Linked from 1 awesome list
analog-designcadence-virtuosomatlabpllveriloga
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