ramulator2

DRAM Simulator

A fast and extensible cycle-accurate DRAM simulator that supports multiple memory standards and RowHammer mitigation techniques.

Ramulator 2.0 is a modern, modular, extensible, and fast cycle-accurate DRAM simulator. It provides support for agile implementation and evaluation of new memory system designs (e.g., new DRAM standards, emerging RowHammer mitigation techniques). Described in our paper https://people.inf.ethz.ch/omutlu/pub/Ramulator2_arxiv23.pdf

GitHub

249 stars
14 watching
61 forks
Language: C++
last commit: 5 months ago
Linked from 1 awesome list

drammemorysimulation

Backlinks from these awesome lists:

Related projects:

Repository Description Stars
chipsalliance/dromajo An emulator designed to run RISC-V RV64GC code on RTL co-simulation hardware 218
drahnr/oregano An application for designing and simulating electronic circuits 215
danarmor/turing_cmd A console-based program simulating the behavior of a Turing machine for educational purposes 10
zombiecraig/icsim A tool that simulates the behavior of an instrument cluster on a vehicle's CAN bus 810
docandrew/yotroc A compiler and virtual machine for a fictional CPU architecture 4
hobbyquaker/hm-simulator A tool for simulating a Homematic CCU's interface to test software integration 3
decalage2/vipermonkey An emulation engine designed to analyze and deobfuscate malicious VBA macros in Microsoft Office files. 1,057
kev-cam/v2k-top A software framework for parsing and simulating digital circuits described in Verilog and C++ languages. 7
dsturnbull/stack_cpu A simulator for a stack-based computer architecture with a set of instructions to perform various operations on a virtual memory. 14
gem5/gem5 A modular simulator for evaluating computer system architectures and designs 1,721
dllim/anotherdelay An audio plugin that simulates the characteristics of analog tape delay units 42
chximn/cpu Simulates an x86-64 CPU architecture in C++ 195
champsim/champsim A software tool used to simulate microarchitectural behavior using traces of past instruction sequences. 525
mariusmm/risc-v-tlm A RISC-V processor simulator with SystemC and TLM-2 support for various instruction sets and peripherals. 279
soegaard/6502 An emulator and toolset for the 6502 CPU 9