Bongard-LOGO
Problem generator
Generates synthetic Bongard problems with minimal human intervention.
Bongard-LOGO is a Python code repository with the purpose of generating synthetic Bongard problems on a large scale with little human intervention.
51 stars
13 watching
11 forks
Language: Python
last commit: almost 3 years ago Related projects:
| Repository | Description | Stars |
|---|---|---|
 whynothugo/python-barcode | A Python library for generating standard barcodes without external dependencies. | 581 |
 bnmcgn/snakes | Generators for Common Lisp with a Python-like interface | 46 |
| nvlabs/ocrodeg | A Python library that generates synthetic document image degradation for data augmentation in handwriting recognition and OCR applications. | 161 |
 plclub/lngen | Tool for generating Coq definitions and proofs for locally nameless representations | 30 |
 climlab/climlab | A flexible Python package for simulating complex climate models as collections of individual processes. | 219 |
 bkaradzic/genie | Automates project setup by generating build files from a Lua script | 909 |
| nvlabs/stylegan3-detector | Developing and testing AI algorithms to detect synthetic images generated by new media synthesis models like StyleGAN3. | 129 |
| nvlabs/edm | This project provides a set of tools and techniques to design and improve diffusion-based generative models. | 1,447 |
 vollmerm/fungp | A Clojure implementation of a genetic programming system to evolve computer programs and solve problems | 100 |
 bjfuliupan/reportlab | A tool for generating PDF documents using template-based layout creation. | 6 |
 gennaro-tedesco/boilit | Creates boilerplate directory structure and code files for Neovim plugins. | 79 |
 weixi-feng/layoutgpt | This project generates visual layouts and scenes using large language models. | 306 |
 proycon/python-frog | A Python binding to a C++ NLP tool for Dutch language processing tasks | 47 |
 bkg/django-spillway | A Django extension providing geospatial features and efficient serialization of geometries | 63 |
 cornell-brg/pymtl3-net | Generates synthesizable Verilog for on-chip networks with customizable parameters and modular design | 43 |